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Cambridge 2027 Computer Science: systems and programming

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AI-assisted English content review; independent teacher approval pending.

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Original, AI-authored English practice with worked guidance. Selected topics only; independent teacher review is pending. This is not a complete syllabus, official past-paper collection or predicted exam score. Check your own exam-board specification: these concepts are not certified against a particular board or exam year.

151 original questions across 21 selected topic areas. No account or payment required to practise.

Cambridge International AS & A Level Computer Science (9618), examination year 2027: AI-assisted conceptual alignment to official sources, not teacher or exam-board certification. Syllabus mapping and remaining coverage.

43 questions in this topic

Exact English revisions checked in an AI-assisted academic review; independent teacher approval is still pending.

All topics

Original multi-part written exercises with indicative worked answers. Conceptual placements require teacher review; these do not certify complete coverage or practical competence.

Subtopics in this topic (43)
  • Character sets and encoded byte lengths
  • Bitmap trade-offs and reasons for compression
  • Network purpose, geographical scale and client thickness
  • Transmission media, access hardware and internet services
  • CSMA/CD and its applicability
  • Embedded systems, monitoring and feedback control
  • Operating principles of nine hardware devices
  • RAM/ROM, SRAM/DRAM and programmable ROM
  • Six gate truth tables and textual symbol descriptions
  • Von Neumann components and bus transfers
  • Peripheral interfaces and producer-consumer buffering
  • Assembly translation, forward references and instruction categories
  • OS services, abstraction and resource utilisation
  • Utility selection and dynamic libraries
  • Assemblers, compilers, interpreters and Java bytecode
  • IDE facilities and fault categories
  • System protection and distinct network threats
  • Seven validation checks and check-digit arithmetic
  • Verification, even parity and checksums
  • Professional ethics and escalation
  • Relational remedies and DBMS architecture
  • SQL DDL versus DML with reproducible results
  • Abstraction, decomposition and algorithm definition
  • Meaningful identifiers and scalar/structured types
  • Structured English, pseudocode and flowchart translation
  • Stepwise refinement and Boolean admission logic
  • Declared array bounds and inclusive STEP loops
  • Implementing a structured-English console design
  • Supplied string functions and returned expressions
  • RAND range and integer bin construction
  • Procedure selection and efficient pseudocode
  • ADTs, operations and persistent history
  • Development life cycles, benefits and trade-offs
  • Structure-chart interfaces and state-transition models
  • Enhancing existing program functionality
  • User-defined enumerations, records and pointers
  • Protocol agreements, layering and circuit switching
  • RISC/CISC, register roles and pipeline timing
  • Flynn classes and massively parallel systems
  • Virtual-machine roles, benefits and limits
  • TLS session authentication and certificate signatures
  • Meaning of programming paradigm
  • 9618 assessment routes and practical evidence limits

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Question 1A register must store names containing A, an accented e (U+00E9), and a smiling face U+1F642. Assume UTF-8 uses 1, 2 and 4 bytes respectively for these characters. (a) Compare 7-bit ASCII, an 8-bit extended-ASCII code page and Unicode for this register, including the danger of exchanging unspecified code pages. (b) Find the UTF-8 payload for 10 copies of the three-character sequence. (c) Explain why Unicode is not synonymous with 16 bits per character.4 indicative marks

A register must store names containing A, an accented e (U+00E9), and a smiling face U+1F642. Assume UTF-8 uses 1, 2 and 4 bytes respectively for these characters. (a) Compare 7-bit ASCII, an 8-bit extended-ASCII code page and Unicode for this register, including the danger of exchanging unspecified code pages. (b) Find the UTF-8 payload for 10 copies of the three-character sequence. (c) Explain why Unicode is not synonymous with 16 bits per character.

Cambridge 2027: Direct conceptual match

Character sets and encoded byte lengths: each cited registered row is explicitly requested and demonstrated in the worked answer. UTF-8 byte count independently checked with a real encoder: three code points occupy seven bytes, repeated ten times seventy. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. 7-bit ASCII represents 2^7=128 characters, including A but not the accented letter or the smiling face. An 8-bit extension has 256 codes, but code pages disagree about many values above 127; a byte can become a different character if decoded with the wrong page.
  2. Unicode provides a common code-point repertoire. Select an agreed encoding such as UTF-8 at both ends, rather than treating every character as an ASCII byte. For the supplied sequence the payload is 1+2+4=7 bytes, so 10 copies occupy 70 bytes, excluding metadata.
  3. A code point is an abstract character number, not necessarily a single 16-bit storage unit. UTF-8 uses varying byte lengths; UTF-16 can require two 16-bit units for a supplementary code point such as U+1F642. Character count alone does not determine encoded file size.

Self-marking points

View marking points
  1. ASCII has 128 codes and cannot represent all required characters.
  2. Extended ASCII has 256 codes per code page, not one universal mapping.
  3. Unicode assigns code points; UTF encodings determine bytes and can represent the whole name.
  4. Obtain 70 bytes and distinguish code points from code units.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 3A college connects 40 lab machines and a printer in one building, then connects a second campus 80 km away. A proposed lab runs all applications on a server; another lab runs applications locally. (a) Explain two concrete networking benefits and distinguish the local network from the inter-campus network. (b) Compare thin and thick clients for processing, local resources, maintenance and failure behaviour. (c) Recommend a client for field work without reliable connectivity, explaining a cost.4 indicative marks

A college connects 40 lab machines and a printer in one building, then connects a second campus 80 km away. A proposed lab runs all applications on a server; another lab runs applications locally. (a) Explain two concrete networking benefits and distinguish the local network from the inter-campus network. (b) Compare thin and thick clients for processing, local resources, maintenance and failure behaviour. (c) Recommend a client for field work without reliable connectivity, explaining a cost.

Cambridge 2027: Direct conceptual match

Network purpose, geographical scale and client thickness: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual scenario review distinguishes networking benefit, LAN/WAN scope and client workload placement; no speed-only definitions. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. The building LAN shares the printer and centrally stored course files, avoiding a printer and duplicate unmanaged files per machine. It also supports messaging. The long-distance inter-campus link forms part of a WAN, often using a carrier's infrastructure; LAN/WAN is not simply wired/wireless or fast/slow.
  2. Thin clients delegate most application processing/storage to a server, reducing local hardware requirements and centralising updates. They depend strongly on server and link availability. Thick clients have local processing, memory and applications; local work can continue during a link outage, though shared services still fail.
  3. For disconnected field work choose a thick client with local data and later synchronisation. It needs capable hardware, local updates and controls for stored copies; synchronisation conflicts are an extra cost. Neither architecture removes the need to secure accounts and backups.

Self-marking points

View marking points
  1. Explain shared printing/files and communication rather than just naming a network.
  2. Classify building LAN versus inter-campus WAN with ownership/distance context.
  3. Contrast server-dependent thin clients with locally processing thick clients.
  4. Recommend thick/offline processing with higher local maintenance or hardware cost.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 5Two stations on an old shared half-duplex Ethernet segment both sense an idle medium and begin sending. (a) Explain why collision is still possible and trace carrier sensing, collision detection, jam, backoff and retry. (b) After a second consecutive collision, they choose backoff slots 1 and 3; describe the next contention, without assuming the later station sends during the other's frame. Explain why slot 3 would not be valid immediately after the first collision. (c) Explain why this is not the normal procedure on a modern full-duplex switched link.4 indicative marks

Two stations on an old shared half-duplex Ethernet segment both sense an idle medium and begin sending. (a) Explain why collision is still possible and trace carrier sensing, collision detection, jam, backoff and retry. (b) After a second consecutive collision, they choose backoff slots 1 and 3; describe the next contention, without assuming the later station sends during the other's frame. Explain why slot 3 would not be valid immediately after the first collision. (c) Explain why this is not the normal procedure on a modern full-duplex switched link.

Cambridge 2027: Direct conceptual match

CSMA/CD and its applicability: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent cross-review corrected the invalid first-collision slot3 to a second-collision example. Numeric window regression checks 0..1 then 0..3; protocol order preserves carrier sensing after backoff and limits CSMA/CD to shared half-duplex Ethernet. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. Carrier sense observes the local medium, not the instantaneous state everywhere. Before the first signal propagates, the other station can also see idle and start. In half-duplex shared Ethernet the transmitters monitor for collision while transmitting.
  2. After detection they send a jam signal so the collision is recognised, abandon the corrupted attempt and choose random backoff slots from a window enlarged by repeated collisions. After the first collision the possible slot counts are 0 or 1; after the second they are 0, 1, 2 or 3. Thus the supplied waits of 1 and 3 are valid after the second collision, not the first. They retry subject to the MAC retry limit; a collision does not deliver a valid frame.
  3. With chosen waits of 1 and 3 slots, the first can start earlier if the medium is idle. The second must still obey carrier sensing: if it finds the first frame in progress it defers rather than transmitting into it. Dedicated full-duplex switch links have separate simultaneous transmit/receive paths and do not use this shared-medium collision-resolution process.

Self-marking points

View marking points
  1. Propagation delay allows simultaneous idle observations.
  2. Detect collision, transmit jam, stop and choose random binary-exponential backoff.
  3. Earlier slot can win; the other station senses busy and defers.
  4. Full-duplex dedicated switch links do not share a collision domain requiring CSMA/CD.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 6An incubator samples temperature and pressure, an infrared sensor detects an open door and a sound sensor measures an alarm level. (a) Distinguish logging these readings from automatically controlling a heater, valve and buzzer. (b) Design feedback rules: heater ON below 36.5, OFF above 37.5, unchanged between, but always OFF when the door is open. Trace temperatures 36,37,38,36 with doors closed,closed,closed,open, initially OFF. (c) Explain two benefits and two limitations of a dedicated embedded controller versus a general-purpose laptop.4 indicative marks

An incubator samples temperature and pressure, an infrared sensor detects an open door and a sound sensor measures an alarm level. (a) Distinguish logging these readings from automatically controlling a heater, valve and buzzer. (b) Design feedback rules: heater ON below 36.5, OFF above 37.5, unchanged between, but always OFF when the door is open. Trace temperatures 36,37,38,36 with doors closed,closed,closed,open, initially OFF. (c) Explain two benefits and two limitations of a dedicated embedded controller versus a general-purpose laptop.

Cambridge 2027: Direct conceptual match

Embedded systems, monitoring and feedback control: each cited registered row is explicitly requested and demonstrated in the worked answer. Executable state-machine trace covers hysteresis and door priority, including both threshold equalities retaining prior state. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. Monitoring records temperature, pressure, infrared door state and sound level for observation. Control uses the measurements to issue actuator commands: heater changes heat, valve changes flow/pressure and buzzer produces a warning. A sensor is an input transducer; an actuator changes the physical system.
  2. Check the door first and force the heater OFF if open. Otherwise set ON for T<36.5, OFF for T>37.5, and retain its state within the band. Repeated sensing closes the feedback loop: the heater affects temperature, which is measured again. The given trace is ON,ON,OFF,OFF; the final low temperature must not override the open-door interlock.
  3. An embedded controller is designed for this fixed task and can be small, low power and predictable without a laptop's general applications. Limited memory/interfaces and less flexible upgrades are drawbacks; a bug or failed sensor can still create unsafe output. The design needs fault handling and independent safety limits, not an assumption that embedded means infallible.

Self-marking points

View marking points
  1. Separate sensor measurement from actuator control and name all four sensor roles.
  2. Give prioritised door interlock and hysteresis feedback rules.
  3. Trace heater states ON,ON,OFF,OFF.
  4. Discuss dedicated low-power/reliable operation alongside upgrade/resource and safety limits.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 7A design workshop records speech, previews it, prints a drawing and fabricates a model. (a) Explain the physical operating chain of a microphone, speaker, laser printer and 3D printer, rather than just naming their uses. (b) Explain reading/writing in magnetic hard disks, flash memory and optical discs. (c) Explain a capacitive touchscreen and a virtual-reality headset, including how movement changes the displayed view. State one limitation for each of the three storage technologies.5 indicative marks

A design workshop records speech, previews it, prints a drawing and fabricates a model. (a) Explain the physical operating chain of a microphone, speaker, laser printer and 3D printer, rather than just naming their uses. (b) Explain reading/writing in magnetic hard disks, flash memory and optical discs. (c) Explain a capacitive touchscreen and a virtual-reality headset, including how movement changes the displayed view. State one limitation for each of the three storage technologies.

Cambridge 2027: Direct conceptual match

Operating principles of nine hardware devices: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual checklist explicitly verifies all nine device operations, not just their applications, plus distinct storage limitations. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. A microphone diaphragm responds to sound-pressure variation and a transducer produces a corresponding electrical signal; an ADC is needed for digital sampling. A speaker's driven coil and magnetic field move a cone to create pressure waves. A laser printer uses a laser to form an electrostatic drum image, attracts toner, transfers it to paper and fuses it with heat/pressure. A 3D printer such as fused-filament fabrication deposits controlled material paths layer by layer from sliced model data.
  2. A magnetic hard disk rotates magnetised platters; a positioned head reads magnetic changes and writes magnetic orientation on tracks/sectors. Mechanical seek and shock sensitivity are limitations. Flash stores charge in nonvolatile transistor cells, reads electrical states and programs/erases electrically; erase-block granularity and finite write/erase endurance matter. An optical drive uses a focused laser and reflected-light differences to recover data; writing alters a recordable dye or rewritable material. Optical media often have lower capacity or slower access than current disks, and scratched surfaces can cause errors.
  3. A capacitive touchscreen detects changes in an electrode grid's capacitance caused by a conductive touch and calculates coordinates; it is not a pressure switch. A VR headset presents slightly different rendered views to the two eyes. Orientation/position sensors update the virtual camera as the wearer moves, and displays/lenses present the new views; tracking/rendering delay can cause discomfort. Describing these chains is written understanding, not a claim to have operated the devices.

Self-marking points

View marking points
  1. Microphone converts pressure-induced vibration to electrical signal; speaker reverses the transduction.
  2. Laser printing uses charged drum, toner transfer and heated fixing; 3D printing builds successive layers.
  3. Describe magnetic tracks/heads, electrically stored flash charge and optical reflectivity/laser reading and writing.
  4. Describe capacitive touch localisation and headset stereoscopic rendering with tracking.
  5. Give distinct disk mechanical, flash endurance and optical capacity/speed limitations.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 8Specify memory for a CPU cache, a large working area, one-time factory configuration, a UV-erasable prototype chip and firmware updated in circuit. (a) Compare RAM and ROM for volatility, writes and boot versus working-data roles. (b) Match SRAM and DRAM to cache/working area and explain refresh, density, speed and price. (c) Distinguish PROM, EPROM and EEPROM, then select the final three memories.4 indicative marks

Specify memory for a CPU cache, a large working area, one-time factory configuration, a UV-erasable prototype chip and firmware updated in circuit. (a) Compare RAM and ROM for volatility, writes and boot versus working-data roles. (b) Match SRAM and DRAM to cache/working area and explain refresh, density, speed and price. (c) Distinguish PROM, EPROM and EEPROM, then select the final three memories.

Cambridge 2027: Direct conceptual match

RAM/ROM, SRAM/DRAM and programmable ROM: each cited registered row is explicitly requested and demonstrated in the worked answer. Reviewed five scenario allocations and the three distinct programming/erasure mechanisms, retaining the ROM-family qualification. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. RAM holds changing program/data while running and normally loses contents without power. ROM-family nonvolatile storage retains boot firmware. The name ROM does not mean every ROM technology can never be updated: programming/erasure mechanisms vary.
  2. SRAM retains a bit in a bistable circuit while powered without periodic refresh, giving low latency but more transistors/area and higher cost per bit. It suits a small CPU cache. DRAM uses charge storage needing refresh; its higher density and lower cost suit a large main working area, at greater access/refresh cost.
  3. Select PROM for a one-time factory-programmed setting because its programmed links cannot be reset normally. Select EPROM for the UV-erasable prototype, typically erased as a whole chip after removal. Select EEPROM for electrically reprogrammable in-circuit firmware. EEPROM avoids a UV erasure window; repeated writes are still not unlimited.

Self-marking points

View marking points
  1. Use volatile read/write RAM for working data and nonvolatile ROM-family memory for firmware.
  2. Choose fast costly low-density SRAM cache versus refreshed dense DRAM main memory.
  3. PROM is one-time programmable; EPROM is UV erased; EEPROM is electrically erased/reprogrammed.
  4. Match the three configuration/firmware scenarios without claiming all ROM is permanently unwritable.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 9(a) Construct complete individual truth tables for NOT, AND, OR, NAND, NOR and XOR; use row order 00,01,10,11 for two inputs. (b) Match these descriptions: triangle with output bubble; D-shaped body; curved OR body; D-shaped with output bubble; OR body with output bubble; OR body with extra input curve. Explain what the bubble means. (c) Distinguish XOR from OR for input 11. These verbal descriptions do not replace recognition of the actual drawn symbols.4 indicative marks

(a) Construct complete individual truth tables for NOT, AND, OR, NAND, NOR and XOR; use row order 00,01,10,11 for two inputs. (b) Match these descriptions: triangle with output bubble; D-shaped body; curved OR body; D-shaped with output bubble; OR body with output bubble; OR body with extra input curve. Explain what the bubble means. (c) Distinguish XOR from OR for input 11. These verbal descriptions do not replace recognition of the actual drawn symbols.

Cambridge 2027: Direct conceptual match

Six gate truth tables and textual symbol descriptions: each cited registered row is explicitly requested and demonstrated in the worked answer. All truth-table rows exhaustively evaluated; textual symbol descriptions explicitly excluded from diagram-recognition credit. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. For the single-input NOT table, (input,output) is (0,1),(1,0). For pairs 00,01,10,11, AND produces 0,0,0,1 and OR produces 0,1,1,1.
  2. NAND is NOT AND, so its outputs are 1,1,1,0. NOR is NOT OR, so its outputs are 1,0,0,0. XOR is true for exactly one of two inputs, giving 0,1,1,0. At 11 OR is 1 but XOR is 0.
  3. The descriptions respectively name NOT, AND, OR, NAND, NOR, XOR. An output bubble denotes inversion; XOR adds the extra input-side curve to an OR-shaped outline. This text-only exercise evidences the truth-table row. The registered symbol-recognition row cs9618-3.2-r1 remains unclosed until actual symbol diagrams are used.

Self-marking points

View marking points
  1. NOT maps 0 to 1 and 1 to 0.
  2. AND/OR outputs are 0001 and 0111 in the specified order.
  3. NAND/NOR/XOR outputs are 1110,1000,0110.
  4. Name all six described shapes and explain inversion and the XOR 11 case.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 10A stored-program processor fetches an instruction at address 40, then reads data at address 90 and adds it to the accumulator. (a) Explain the Von Neumann stored-program model and distinguish instruction/data interpretation. (b) Explain ALU, control unit, clock and immediate access store roles. (c) Trace an instruction fetch and data read using address, data and control buses; explain bus directions and the shared-path bottleneck.4 indicative marks

A stored-program processor fetches an instruction at address 40, then reads data at address 90 and adds it to the accumulator. (a) Explain the Von Neumann stored-program model and distinguish instruction/data interpretation. (b) Explain ALU, control unit, clock and immediate access store roles. (c) Trace an instruction fetch and data read using address, data and control buses; explain bus directions and the shared-path bottleneck.

Cambridge 2027: Direct conceptual match

Von Neumann components and bus transfers: each cited registered row is explicitly requested and demonstrated in the worked answer. Reviewed both bus transactions, source/destination directions and component roles without conflating memory with persistent storage. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

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Worked guidance

  1. Von Neumann stores encoded instructions and data in the same main memory and uses a stored instruction sequence to direct processing. Bits are not intrinsically an instruction or an operand: the current operation determines their interpretation. Immediate access store is directly accessible working memory, not long-term disk storage.
  2. The control unit decodes the fetched instruction and issues control signals; the clock coordinates stages at timing intervals. The ALU performs arithmetic/logical operations, such as adding the operand to the accumulator. These roles are distinct even though an implementation may overlap stages.
  3. For fetch, the CPU presents address 40 on the address bus, asserts memory-read on the control bus and receives the instruction on the data bus. The operand read similarly sends 90, asserts read and receives its value. In this simple CPU-memory model the address travels from CPU to memory, data can travel either way for reads/writes, and control includes CPU requests and returning status/interrupt signals. Shared instruction/data transfer capacity can become a bottleneck; a higher clock alone does not guarantee more memory bandwidth.

Self-marking points

View marking points
  1. Instructions and data occupy the same addressable main memory.
  2. Distinguish ALU computation, CU decoding/control, clock timing and immediate memory.
  3. Trace address 40/read/instruction data then address 90/read/operand data.
  4. Explain address output, bidirectional data and mixed-direction control signals plus contention.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 11A workstation connects a keyboard, a digital monitor with audio and a legacy analogue monitor. (a) Select USB, HDMI or VGA for each and compare transported signals, including audio support. (b) A printer accepts 12 MB/s into an initially empty 8 MB buffer but consumes 4 MB/s while receiving. Find time to fill if rates remain constant. (c) Explain why buffering helps but cannot sustain these rates indefinitely, and what flow control should do.4 indicative marks

A workstation connects a keyboard, a digital monitor with audio and a legacy analogue monitor. (a) Select USB, HDMI or VGA for each and compare transported signals, including audio support. (b) A printer accepts 12 MB/s into an initially empty 8 MB buffer but consumes 4 MB/s while receiving. Find time to fill if rates remain constant. (c) Explain why buffering helps but cannot sustain these rates indefinitely, and what flow control should do.

Cambridge 2027: Direct conceptual match

Peripheral interfaces and producer-consumer buffering: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent fluid-buffer model confirms one-second saturation; all three interface signal categories explicitly distinguished. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

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Worked guidance

  1. USB carries peripheral data and commonly supplies power to the keyboard. HDMI carries digital video and audio to the suitable monitor. VGA carries analogue video to the legacy monitor, not an audio channel; audio would need a separate connection. The connectors are not interchangeable merely because all connect peripherals.
  2. The buffer temporarily holds output data so the producer and printer can operate at different instantaneous rates. Net fill rate is 12-4=8 MB/s. An 8 MB initially empty buffer fills in 8/8=1 s, assuming concurrent receipt and consumption and the stated constant decimal MB rates.
  3. A buffer smooths bursts but does not create sustained printer throughput. After it fills, the sender must pause or reduce its average rate to no more than the consumer can sustain, using flow control/backpressure. Otherwise data would be lost or overwritten; buying a larger finite buffer only delays that point.

Self-marking points

View marking points
  1. Use USB for keyboard, HDMI for digital audio/video, VGA for analogue video without audio.
  2. Explain USB peripheral data/power versus display signals.
  3. Calculate net accumulation 8 MB/s and fill time 1 second.
  4. Explain temporary decoupling and throttling/backpressure on a finite buffer.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 12Use a toy ISA: each instruction occupies one word from address 0; IN reads ACC, OUT emits ACC, LDA x loads memory[x], ADD x adds it, CMP x sets equality, JPE x jumps on equality, JMP x jumps always, STO x stores ACC. Program: IN; STO VALUE; CMP ZERO; JPE END; LDA VALUE; ADD ONE; OUT; JMP END; END: OUT; ZERO: DATA 0; ONE: DATA 1; VALUE: DATA 0. (a) Build a first-pass symbol table and resolve both forward branch operands in pass two. (b) Classify movement, I/O, arithmetic, comparison and branch instructions. (c) Trace input 0 and input 4, stopping after END's OUT; explain the mnemonic/machine-code relationship. Labels occupy no extra words. Stopping there is a rule of this trace, not an implicit hardware halt.5 indicative marks

Use a toy ISA: each instruction occupies one word from address 0; IN reads ACC, OUT emits ACC, LDA x loads memory[x], ADD x adds it, CMP x sets equality, JPE x jumps on equality, JMP x jumps always, STO x stores ACC. Program: IN; STO VALUE; CMP ZERO; JPE END; LDA VALUE; ADD ONE; OUT; JMP END; END: OUT; ZERO: DATA 0; ONE: DATA 1; VALUE: DATA 0. (a) Build a first-pass symbol table and resolve both forward branch operands in pass two. (b) Classify movement, I/O, arithmetic, comparison and branch instructions. (c) Trace input 0 and input 4, stopping after END's OUT; explain the mnemonic/machine-code relationship. Labels occupy no extra words. Stopping there is a rule of this trace, not an implicit hardware halt.

Cambridge 2027: Direct conceptual match

Assembly translation, forward references and instruction categories: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent bounded ISA interpreter verifies symbols, both forward jumps, memory writes and two output paths including duplicate output. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. Pass one counts instruction/data words and records labels: END 8, ZERO 9, ONE 10, VALUE 11. The first IN is address 0; labels themselves allocate no separate word. Pass two uses the symbol table to encode JPE END and JMP END with target 8, and addresses VALUE/ZERO/ONE with 11/9/10.
  2. LDA and STO move data; IN/OUT perform I/O; ADD is arithmetic; CMP is comparison; JPE/JMP alter control flow. A mnemonic is human-readable notation for an instruction whose opcode and operand fields are represented as machine-code bits; actual encoding depends on the ISA, not on the spelling of the label.
  3. Input 0 is stored, equals ZERO and jumps directly to END: OUT emits 0 once. Input 4 fails equality, loads VALUE, adds ONE and emits 5 at address 6; JMP then reaches the second OUT at END and emits 5 again. Thus output lists are [0] and [5,5]. Stop after that OUT as specified; a real program would need an explicit halt or other valid control transfer rather than falling into DATA. Two-pass resolution handles the forward labels without inventing their addresses on first encounter.

Self-marking points

View marking points
  1. Assign END=8,ZERO=9,ONE=10,VALUE=11.
  2. Resolve JPE and JMP to address 8 after symbols are known.
  3. Classify all five instruction categories correctly.
  4. Trace outputs [0] and [5,5], explaining the repeated OUT.
  5. Explain assembler maps mnemonics/operands to ISA-specific encoded instructions.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 13Two lab users run an editor, print job and disk backup concurrently. (a) Explain why an OS is useful instead of every application controlling hardware directly. (b) Allocate memory, file, security, device and process-management responsibilities to this scenario. (c) Explain how a GUI or command-line user interface hides hardware complexity, distinguish that interface from an application API, and explain how overlapping CPU work with blocked I/O improves resource use; identify one contention risk.4 indicative marks

Two lab users run an editor, print job and disk backup concurrently. (a) Explain why an OS is useful instead of every application controlling hardware directly. (b) Allocate memory, file, security, device and process-management responsibilities to this scenario. (c) Explain how a GUI or command-line user interface hides hardware complexity, distinguish that interface from an application API, and explain how overlapping CPU work with blocked I/O improves resource use; identify one contention risk.

Cambridge 2027: Direct conceptual match

OS services, abstraction and resource utilisation: each cited registered row is explicitly requested and demonstrated in the worked answer. Cross-review added explicit GUI/CLI user actions hiding disk-sector/controller complexity for16.1-r2, separately from application APIs. Scenario matrix checks all five OS services and overlapping runnable work with blocked I/O. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

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Worked guidance

  1. The OS provides controlled access to shared hardware so each application need not implement scheduling, storage protocols and isolation itself. Without arbitration, applications could overwrite one another's memory or simultaneously issue incompatible device commands.
  2. Memory management allocates/protects editor and backup address spaces. File management maintains names/directories and access to the backup files. Security authenticates users and checks permissions. Device management uses drivers and printer spooling. Process management schedules runnable tasks and blocks those awaiting I/O.
  3. A user selects a named document in a GUI file manager or issues a copy command in a CLI without specifying disk sectors or device-controller instructions. This user interface hides hardware complexity from the person. An application API separately lets software request operations such as opening a named file; a driver/kernel translates requests into hardware operations. While a print task waits for the device, the CPU can run the editor, improving utilisation instead of spinning idle. Disk backup may still contend with editing saves, so priorities/fairness and buffering must balance throughput against responsiveness.

Self-marking points

View marking points
  1. OS mediates applications and hardware with protected shared services.
  2. Apply all five management roles to the stated jobs.
  3. Explain consistent file/device APIs over drivers, not identical physical devices.
  4. Explain runnable work during I/O waits and contention/fairness limitations.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 14A support team faces an unformatted new volume, suspected malware, file-system inconsistency, limited backup space and recovery after disk loss. (a) Choose and explain a utility for each, including a precaution before repair/formatting. (b) Several applications need the same image-decoding routine: compare copying its source into every app with using a shared DLL. (c) Explain deployment/version and security risks rather than claiming a shared library is always better.4 indicative marks

A support team faces an unformatted new volume, suspected malware, file-system inconsistency, limited backup space and recovery after disk loss. (a) Choose and explain a utility for each, including a precaution before repair/formatting. (b) Several applications need the same image-decoding routine: compare copying its source into every app with using a shared DLL. (c) Explain deployment/version and security risks rather than claiming a shared library is always better.

Cambridge 2027: Direct conceptual match

Utility selection and dynamic libraries: each cited registered row is explicitly requested and demonstrated in the worked answer. Reviewed five distinct utilities, destructive-operation precaution and both DLL benefits and version/security failure modes. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. Format the new volume to create the required file-system structures; scan/quarantine suspected malware; use a file-system checking/repair utility for inconsistent metadata. Compress suitable backup data to save capacity and maintain a tested backup on an independent device/location to recover after disk loss. Compression alone is not a backup. Confirm the target and preserve recoverable data before destructive formatting or risky repair.
  2. A program library supplies reusable routines through a documented interface, avoiding repeated implementation and testing. A DLL is loaded/linked at runtime so multiple applications can use common compatible code, potentially sharing read-only code pages and permitting a central patch.
  3. A missing DLL or incompatible interface/version can stop applications; a malicious library can execute with their privileges. Use trusted versions, controlled search paths and compatibility testing. Static copies can simplify a self-contained deployment but require patching each copy and duplicate code storage. Reuse does not remove the need to validate the library's behaviour for the application.

Self-marking points

View marking points
  1. Match formatting, malware scanning, file-system repair, compression and backup to different needs.
  2. Warn formatting/repair can destroy or change data and require a sound recovery copy.
  3. Explain reusable tested routines and dynamically loaded shared code.
  4. Discuss compatible versions, missing dependencies and library trust/patching.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 15A team has an assembly sensor driver, a high-level desktop tool and a rapidly changing console script. (a) Explain why each needs translation/execution support and compare assembler, compiler and interpreter. (b) Recommend compilation versus interpretation for release speed and interactive debugging, explaining trade-offs. (c) Trace Java source to class-file bytecode to execution on a JVM; distinguish the virtual machine from a claim that every implementation only interprets. Explain the textbook interpreter model without a saved standalone translated executable.4 indicative marks

A team has an assembly sensor driver, a high-level desktop tool and a rapidly changing console script. (a) Explain why each needs translation/execution support and compare assembler, compiler and interpreter. (b) Recommend compilation versus interpretation for release speed and interactive debugging, explaining trade-offs. (c) Trace Java source to class-file bytecode to execution on a JVM; distinguish the virtual machine from a claim that every implementation only interprets. Explain the textbook interpreter model without a saved standalone translated executable.

Cambridge 2027: Direct conceptual match

Assemblers, compilers, interpreters and Java bytecode: each cited registered row is explicitly requested and demonstrated in the worked answer. Primary JVM specification and Python interpreter documentation checked; pure interpreter model distinguished from bytecode caching and JIT implementations. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

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Worked guidance

  1. Hardware executes its instruction set, not arbitrary high-level text. An assembler converts driver mnemonics and symbolic operands to machine instructions. A compiler translates a source unit before execution and reports translation errors. An interpreter executes program operations through a runtime, commonly interleaving analysis and execution rather than producing a standalone native executable first.
  2. A compiled release can run without the source translator and can optimise ahead of time; build cycles and target-specific binaries cost time/portability. An interpreter often supports rapid edit-run-debug cycles but requires an appropriate runtime and may incur dispatch overhead. Actual speed depends on implementations and workload, not simply language names.
  3. Java source is compiled into class-file bytecode with metadata. A JVM loads/verifies it and executes according to the virtual instruction set, often mixing interpretation and just-in-time native compilation. This hybrid is distinct from both direct native ahead-of-time output and the textbook interpreter that saves no independently executable translated program. Python implementations may cache bytecode too; 'interpreter' does not imply no internal representation ever exists.

Self-marking points

View marking points
  1. Assembler translates assembly; compiler translates a source unit; interpreter executes using runtime translation/dispatch.
  2. Contrast release performance and interactive diagnostics without promising one universal speed rule.
  3. Java compilation produces bytecode for a JVM, which may interpret and JIT compile.
  4. In the simple interpreter model execution needs source/runtime again, not a saved native standalone result.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 16A Python mean function contains these independent faults: a missing colon after an if header; division by len(values) when values is empty; and returning sum(values)//len(values) for nonempty integer values when a real mean is intended. (a) Classify each and give an exposing input or action. (b) Explain how syntax highlighting/checking, indentation formatting, completion, breakpoints, watches and stepping help without proving correctness. (c) Give a prevention and a corrected mean function that rejects empty input.4 indicative marks

A Python mean function contains these independent faults: a missing colon after an if header; division by len(values) when values is empty; and returning sum(values)//len(values) for nonempty integer values when a real mean is intended. (a) Classify each and give an exposing input or action. (b) Explain how syntax highlighting/checking, indentation formatting, completion, breakpoints, watches and stepping help without proving correctness. (c) Give a prevention and a corrected mean function that rejects empty input.

Cambridge 2027: Direct conceptual match

IDE facilities and fault categories: each cited registered row is explicitly requested and demonstrated in the worked answer. Actual published Python function executed on fractional, singleton and empty cases; exception classes and division semantics checked against Python docs. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. The missing colon prevents parsing: a syntax error is exposed by a syntax check or attempted execution. For an otherwise valid function, [] triggers ZeroDivisionError at runtime. [1,2] produces 1 with // instead of intended 1.5: valid execution but wrong logic. These faults must be considered separately because a syntax failure masks later execution.
  2. Highlighting/checking marks a suspect header; indentation formatting makes scope visible; completion reduces identifier typos. Set a breakpoint before division, watch values and its length, then step to observe the failure or wrong quotient. Such tools help locate errors but cannot infer every intended requirement. Prevent faults with explicit preconditions, review and tests for empty, singleton and fractional-mean cases.
  3. def mean(values):
        if not values:
            raise ValueError('empty sample')
        return sum(values) / len(values)
  4. The guard deliberately reports invalid empty input instead of allowing division by zero. mean([1,2]) returns 1.5 and mean([7]) returns 7.0. An expected ValueError on [] is a documented error path, not an unexplained crash.

Self-marking points

View marking points
  1. Classify missing colon as syntax, empty division as runtime, floor division as logic fault.
  2. Use [] and [1,2] to expose runtime and wrong fractional output.
  3. Apply six concrete IDE facilities and discuss their limits.
  4. Provide guard plus real division and regression tests.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 17A school has encrypted grade files but leaves its server unpatched. A message asks staff to enter credentials on a lookalike site; a compromised name-resolution setting redirects genuine typed addresses; a self-propagating malicious program disrupts service; an intruder exploits an unpatched login service. (a) Identify and distinguish the four threats and their entry mechanisms. (b) Explain why protecting stored data alone is insufficient. (c) Pair each incident with a specific prevention/detection measure and a realistic limit.4 indicative marks

A school has encrypted grade files but leaves its server unpatched. A message asks staff to enter credentials on a lookalike site; a compromised name-resolution setting redirects genuine typed addresses; a self-propagating malicious program disrupts service; an intruder exploits an unpatched login service. (a) Identify and distinguish the four threats and their entry mechanisms. (b) Explain why protecting stored data alone is insufficient. (c) Pair each incident with a specific prevention/detection measure and a realistic limit.

Cambridge 2027: Direct conceptual match

System protection and distinct network threats: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual incident-to-threat matching reviewed for all four mechanisms; encryption-at-rest is not incorrectly treated as a complete system safeguard. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. The deceptive credential message is phishing: social engineering leads the user to disclose credentials. Redirecting a correctly typed name by corrupting DNS/hosts settings is pharming. The self-propagating malicious program is malware (for example a worm). Exploiting a service for unauthorised access is an intrusion by an attacker; it need not involve a deceptive email.
  2. Encryption at rest does not patch a vulnerable service or keep the server available. An attacker controlling the running system may obtain authorised plaintext access, steal keys, alter software or deny service. Protect system configuration, updates, accounts and availability as well as grade-file confidentiality.
  3. Use staff verification procedures and phishing-resistant MFA to reduce credential theft; secure DNS/host configuration and verify TLS identities against redirection; use endpoint protection, segmentation and prompt updates against malware; patch the login service and restrict exposure/privileges against exploitation. Monitoring, incident isolation and recoverable backups limit damage. No single measure eliminates all attacks or user error.

Self-marking points

View marking points
  1. Distinguish phishing, pharming, malware and unauthorised exploitation.
  2. Protect availability, software integrity and control credentials as well as stored files.
  3. Match training/MFA, protected name resolution, malware controls and patching/least privilege to mechanisms.
  4. Explain residual risk and response rather than claiming encryption stops every threat.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 18An order requires a nonempty name, age from 16 to 100 inclusive, code exactly two uppercase letters followed by four digits, postcode length 6, product ID found in a product table and quantity at most 20. (a) Name and apply presence, range, format, length, existence and limit checks separately with a failing example for each. (b) For a five-digit identifier plus check digit c, define c=(10-(sum of the five digits MOD 10)) MOD 10. Find c for 31415 and test 314159. (c) Give a changed identifier this check cannot detect; distinguish validation from truth.4 indicative marks

An order requires a nonempty name, age from 16 to 100 inclusive, code exactly two uppercase letters followed by four digits, postcode length 6, product ID found in a product table and quantity at most 20. (a) Name and apply presence, range, format, length, existence and limit checks separately with a failing example for each. (b) For a five-digit identifier plus check digit c, define c=(10-(sum of the five digits MOD 10)) MOD 10. Find c for 31415 and test 314159. (c) Give a changed identifier this check cannot detect; distinguish validation from truth.

Cambridge 2027: Direct conceptual match

Seven validation checks and check-digit arithmetic: each cited registered row is explicitly requested and demonstrated in the worked answer. Check-digit algorithm executed for valid/invalid examples and a transposition collision; field-rule boundaries independently tested. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. Presence rejects an empty name; range rejects age 15 or 101. Format rejects A12345 because the required pattern is two uppercase letters plus four digits. Length rejects a five-character postcode. Existence rejects a product ID absent from the authoritative table. A one-sided limit rejects quantity 21; this stated limit alone does not reject a negative quantity unless a lower-bound rule is added.
  2. The digit sum of 31415 is 3+1+4+1+5=14. c=(10-4) MOD 10=6, so the accepted full string is 314156. For 314159, 14+9=23 and 23 MOD 10=3, so reject it.
  3. Swapping the first two digits yields 134156 with the same digit sum, so this deliberately weak check digit misses that transposition. Validation tests conformance to rules, not whether a person really has the stated age or whether the intended product was selected.

Self-marking points

View marking points
  1. Apply all six named field checks with concrete failures.
  2. Sum 31415 digits to 14 and obtain c=6.
  3. Reject 314159 because 14+9 is not a multiple of 10.
  4. Explain a digit permutation passes this weak checksum and valid data may still be false.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 19A clerk copies 4826 as 4862. (a) Explain visual verification and double-entry verification, including what happens if both entries repeat the same mistake. (b) Data 1011001 uses an appended even-parity bit: find it, test received 10110011 and show a two-bit error parity can miss. (c) For bytes 12,250,9 use a checksum equal to their sum MOD 256. Compute it and give a two-byte change leaving it unchanged. Explain why detection is not correction or authentication.4 indicative marks

A clerk copies 4826 as 4862. (a) Explain visual verification and double-entry verification, including what happens if both entries repeat the same mistake. (b) Data 1011001 uses an appended even-parity bit: find it, test received 10110011 and show a two-bit error parity can miss. (c) For bytes 12,250,9 use a checksum equal to their sum MOD 256. Compute it and give a two-byte change leaving it unchanged. Explain why detection is not correction or authentication.

Cambridge 2027: Direct conceptual match

Verification, even parity and checksums: each cited registered row is explicitly requested and demonstrated in the worked answer. Executable bit counts, a two-bit corruption and modulo checksum collision independently verified. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. Visual verification compares the captured 4862 against the source 4826. Double entry captures the value independently twice and compares; disagreement prompts checking the source. If both entries are the same wrong value, the comparison passes. Neither process establishes that the source itself was true.
  2. 1011001 has four ones, so append 0: 10110010 has even parity. Received 10110011 has five ones and fails. Flipping the first two bits of the valid word gives 01110010, still with four ones, so this two-bit corruption is not detected by simple even parity.
  3. 12+250+9=271; 271 MOD 256=15. Replacing the first two bytes by 13 and 249 leaves the sum 271 and checksum 15. A mismatch detects inconsistency but does not identify/repair the original bytes. An attacker can recompute this unkeyed checksum, so it does not authenticate a sender.

Self-marking points

View marking points
  1. Compare against source or independently re-enter; matching repeated error can evade verification.
  2. Four data ones imply appended parity 0; received word has odd parity and fails.
  3. Give a two-bit flip with unchanged even parity.
  4. Compute checksum 15 and a cancelling corruption, distinguishing detection from authenticity.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 20A junior developer is asked to release a safety-alarm patch without tests and to conceal a known defect in the release notes. (a) Explain how professional bodies such as BCS and IEEE support professional conduct, distinguishing a code of ethics from a product safety certificate or a law. (b) Apply duties of competence, honesty, confidentiality and public interest to this decision. (c) Propose a documented escalation path that protects users without unnecessarily disclosing private customer data.4 indicative marks

A junior developer is asked to release a safety-alarm patch without tests and to conceal a known defect in the release notes. (a) Explain how professional bodies such as BCS and IEEE support professional conduct, distinguishing a code of ethics from a product safety certificate or a law. (b) Apply duties of competence, honesty, confidentiality and public interest to this decision. (c) Propose a documented escalation path that protects users without unnecessarily disclosing private customer data.

Cambridge 2027: Direct conceptual match

Professional ethics and escalation: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual ethical-duty checklist includes competence, honesty, confidentiality, public interest and responsible escalation, not merely naming organisations. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. BCS and IEEE are examples of professional bodies that publish ethical/professional guidance, support development and promote accountable conduct. A code sets expectations for members' behaviour; it is not legislation and does not certify that this particular alarm patch is safe.
  2. Competence requires testing or qualified review rather than asserting safety beyond the evidence. Honesty rules out concealing the known defect. Public interest prioritises foreseeable harm to users over an arbitrary release deadline, while confidentiality requires limiting access to personal or commercially sensitive material.
  3. Record the defect, affected behaviour, evidence and test gaps; request a release hold and escalate through the technical lead and safety/compliance process. Propose mitigations and an authorised user-warning plan. If unresolved, seek appropriate independent professional/regulatory advice through legitimate channels with minimum necessary confidential detail. This is an ethics exercise, not a legal determination or an endorsement by either body.

Self-marking points

View marking points
  1. Explain professional standards, guidance, development and accountability through professional bodies.
  2. Apply competence, honest reporting and public-interest duties to the defect.
  3. Balance responsible disclosure with confidentiality.
  4. Give evidence-based internal escalation and appropriate independent oversight without implying body approval of the patch.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 21Separate files duplicate Member addresses in every Loan record; two programs disagree after an address change. (a) Propose a relational remedy using Member and Loan with keys, explaining reduced duplication and referential integrity. (b) Explain a DBMS data dictionary, modelling/schema support, integrity enforcement, access control and backup/recovery in this migration. (c) Trace a developer's parameterised query through an interface and query processor to a result; distinguish an index from an authorisation check.4 indicative marks

Separate files duplicate Member addresses in every Loan record; two programs disagree after an address change. (a) Propose a relational remedy using Member and Loan with keys, explaining reduced duplication and referential integrity. (b) Explain a DBMS data dictionary, modelling/schema support, integrity enforcement, access control and backup/recovery in this migration. (c) Trace a developer's parameterised query through an interface and query processor to a result; distinguish an index from an authorisation check.

Cambridge 2027: Direct conceptual match

Relational remedies and DBMS architecture: each cited registered row is explicitly requested and demonstrated in the worked answer. Reviewed every DBMS subrequirement and the explicit relationship between duplicate-file anomalies and relational keys/constraints. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. Store each address once in Member keyed by MemberID; Loan holds LoanID and a MemberID foreign key. Changing the single member row updates the authoritative value for every joined view, while the foreign key prevents a loan referring to a nonexistent member. Central structure and constraints reduce inconsistency; they do not automatically fix bad legacy data.
  2. The data dictionary stores metadata such as field types, keys and constraints, not merely member values. A modelling tool helps design relationships; the schema defines the implemented tables and relationships. Integrity constraints reject invalid references. Access control grants the loan clerk required operations without exposing all addresses; backup and transaction-log recovery provide a recovery path after failure and must be tested.
  3. A developer uses a driver/API or query console to submit parameterised SQL. The query processor parses syntax, resolves names/types, checks authorisation, selects a plan and executes it to return rows. An index may accelerate locating MemberID values, but finding a row quickly does not authorise reading it; permissions remain a separate check.

Self-marking points

View marking points
  1. Separate Member(MemberID,Address) and Loan(LoanID,MemberID) with a foreign key.
  2. Relate one authoritative address and integrity constraints to update inconsistency.
  3. Explain all six named DBMS facilities with migration examples.
  4. Describe interface, parse/validate/plan/execute/result pipeline and index versus permission roles.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 22Use SQL for Stock(Code INTEGER PRIMARY KEY, Qty INTEGER NOT NULL). Initially it is empty. (a) Create it, insert (7,4) and (8,0), add 3 to item 7, delete zero-quantity rows and select remaining rows ordered by Code. Give the result. (b) Classify structure definition versus data manipulation and explain why SQL serves both. (c) Explain the purpose of WHERE in UPDATE/DELETE and why SQL-standard syntax does not guarantee identical extensions/types in every DBMS.4 indicative marks

Use SQL for Stock(Code INTEGER PRIMARY KEY, Qty INTEGER NOT NULL). Initially it is empty. (a) Create it, insert (7,4) and (8,0), add 3 to item 7, delete zero-quantity rows and select remaining rows ordered by Code. Give the result. (b) Classify structure definition versus data manipulation and explain why SQL serves both. (c) Explain the purpose of WHERE in UPDATE/DELETE and why SQL-standard syntax does not guarantee identical extensions/types in every DBMS.

Cambridge 2027: Direct conceptual match

SQL DDL versus DML with reproducible results: each cited registered row is explicitly requested and demonstrated in the worked answer. The exact published SQL executes in an in-memory SQLite database; final rows and primary-key/non-null failures checked without persistent files. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. CREATE TABLE Stock (Code INTEGER PRIMARY KEY, Qty INTEGER NOT NULL);
    INSERT INTO Stock VALUES (7,4);
    INSERT INTO Stock VALUES (8,0);
    UPDATE Stock SET Qty=Qty+3 WHERE Code=7;
    DELETE FROM Stock WHERE Qty=0;
    SELECT Code, Qty FROM Stock ORDER BY Code;
  2. After insertion the rows are (7,4),(8,0). The update changes only the first quantity to 7, and deletion removes (8,0). The final result is [(7,7)]. Omitting WHERE would update or delete every qualifying row in the entire table, not just a selected screen row.
  3. CREATE defines structure and is DDL. INSERT, UPDATE and DELETE maintain values; SELECT retrieves them, conventionally grouped as DML in this syllabus. SQL supplies both classes of statement as a standard language, while products have dialect extensions, different type/constraint details and version differences. The displayed subset is tested with SQLite, not asserted to cover every SQL dialect.

Self-marking points

View marking points
  1. Create a keyed table and insert both rows.
  2. Update only Code=7 and delete only Qty=0.
  3. Return [(7,7)] ordered by Code.
  4. Distinguish CREATE DDL from INSERT/UPDATE/DELETE/SELECT DML and discuss dialect limits.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 23A booking system must accept a room, start and end slots and reject overlaps. Rooms also have wall colours and photographs. (a) Construct a minimal abstraction for deciding clashes and justify what is omitted. (b) Decompose input, validation, clash checking, persistence and confirmation into modules with clear responsibilities. (c) Give finite, unambiguous steps for testing one candidate against existing bookings, using half-open intervals [start,end); explain why a goal such as 'avoid clashes' is not itself an algorithm.4 indicative marks

A booking system must accept a room, start and end slots and reject overlaps. Rooms also have wall colours and photographs. (a) Construct a minimal abstraction for deciding clashes and justify what is omitted. (b) Decompose input, validation, clash checking, persistence and confirmation into modules with clear responsibilities. (c) Give finite, unambiguous steps for testing one candidate against existing bookings, using half-open intervals [start,end); explain why a goal such as 'avoid clashes' is not itself an algorithm.

Cambridge 2027: Direct conceptual match

Abstraction, decomposition and algorithm definition: each cited registered row is explicitly requested and demonstrated in the worked answer. Executable interval predicate checked on overlap, touching endpoints, distinct rooms and invalid interval boundaries. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. A clash decision needs room identity and interval endpoints, not wall colour or photographs. The abstraction preserves relevant distinctions: removing RoomID would falsely conflict bookings in different rooms. Adopt [start,end), so one booking may start exactly when another ends.
  2. ReadCandidate obtains input; Validate checks start<end and legal slots; HasClash compares a valid candidate with stored bookings; SaveBooking persists only an accepted booking; Confirm reports the result. Each module has a narrow responsibility and passes a candidate or Boolean outcome rather than relying on unrelated global state.
  3. First reject a candidate with start>=end. For each existing record, if RoomID matches and candidate.start<record.end and record.start<candidate.end, return clash immediately. Return no clash only after the last record. On [2,4), existing [4,6) is not a clash but [3,5) is. The finite ordered comparisons and returns form an algorithm; 'avoid clashes' states a desired result without saying how to compute it.

Self-marking points

View marking points
  1. Model RoomID,start,end; omit irrelevant decoration while retaining room identity.
  2. Decompose into five named responsibilities with data interfaces.
  3. Reject invalid intervals then test same room and start<oldEnd AND oldStart<end.
  4. Return reject on first clash, otherwise accept after finite scan; distinguish goal from executable steps.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 24A delivery record holds a tracking code that can begin with zero, parcel count, mass with fractions, delivery status, one service letter and a delivery date. (a) Design an identifier table with name, type, purpose and example for all six. (b) Group them as a record and choose an array for a day's 100 deliveries, explaining scalar versus structured types. (c) Explain the error in using INTEGER for the code or REAL for a date.4 indicative marks

A delivery record holds a tracking code that can begin with zero, parcel count, mass with fractions, delivery status, one service letter and a delivery date. (a) Design an identifier table with name, type, purpose and example for all six. (b) Group them as a record and choose an array for a day's 100 deliveries, explaining scalar versus structured types. (c) Explain the error in using INTEGER for the code or REAL for a date.

Cambridge 2027: Direct conceptual match

Meaningful identifiers and scalar/structured types: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual six-field identifier/type/purpose/example table reviewed against scalar versus record/array distinctions and leading-zero preservation. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. Identifier table: TrackingCode: STRING, lookup identifier, '00421'; ParcelCount: INTEGER, number of parcels, 3; MassKg: REAL, measured mass, 2.75. Names communicate roles instead of ambiguous X,Y,Z and the type must fit the value's meaning, not just its printed characters.
  2. Delivered: BOOLEAN, completed status, TRUE; Service: CHAR, single category letter, 'E'; DeliveryDate: DATE, calendar delivery day, 2027-05-14. INTEGER/REAL/BOOLEAN/CHAR/DATE/STRING are the selected scalar/basic values in the syllabus model; a record groups their heterogeneous fields.
  3. Define a Delivery record containing those six fields and an array Day[1:100] OF Delivery. The array is homogeneous at the element type level although its records contain different field types. An INTEGER code would turn '00421' into 421, losing significant formatting. A date stored as REAL has no inherent calendar validation or date-operation semantics; DATE states the intended abstraction.

Self-marking points

View marking points
  1. Choose TrackingCode STRING, ParcelCount INTEGER and MassKg REAL with meaningful identifiers.
  2. Choose Delivered BOOLEAN, Service CHAR and DeliveryDate DATE with appropriate examples.
  3. Use a mixed-field Delivery record and homogeneous Delivery array.
  4. Preserve leading zeros and calendar semantics rather than numeric coincidence.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 25Structured English: start a total at zero; read integers until -1; for each value other than -1, add only positive values; then output the total. (a) Translate this into declared Cambridge pseudocode using sequence, selection and iteration. (b) Draw the equivalent flowchart with terminal, I/O, process and decision symbols, labelling every branch and loop edge. (c) Dry-run 3,0,-2,4,-1 and immediate -1, showing the output and why the sentinel is not added.4 indicative marks

Structured English: start a total at zero; read integers until -1; for each value other than -1, add only positive values; then output the total. (a) Translate this into declared Cambridge pseudocode using sequence, selection and iteration. (b) Draw the equivalent flowchart with terminal, I/O, process and decision symbols, labelling every branch and loop edge. (c) Dry-run 3,0,-2,4,-1 and immediate -1, showing the output and why the sentinel is not added.

Cambridge 2027: Direct conceptual match

Structured English, pseudocode and flowchart translation: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent stream execution covers positives, zero, other negatives and an immediate sentinel; node/edge checklist checks the chart's retry and termination paths. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. DECLARE Value : INTEGER
    DECLARE Total : INTEGER
    Total <- 0
    INPUT Value
    WHILE Value <> -1 DO
       IF Value > 0 THEN
          Total <- Total + Value
       ENDIF
       INPUT Value
    ENDWHILE
    OUTPUT Total
  2. Draw Start oval -> Total=0 process rectangle -> Input Value parallelogram -> Value<>-1? diamond. Its No edge goes to Output Total parallelogram -> End oval. Its Yes edge goes to Value>0? diamond; Yes goes to Total=Total+Value rectangle, No bypasses that rectangle. Both paths join at Input Value parallelogram, whose outgoing arrow returns to the Value<>-1? diamond. Thus no path forgets the next input or bypasses the sentinel decision.
  3. The running totals after processing 3,0,-2,4 are 3,3,3,7. Reading -1 exits before the positivity test and outputs 7. An initial -1 skips the loop entirely and outputs initial total 0. A flowchart and pseudocode are alternative precise representations of the same algorithm, not different algorithms here.

Self-marking points

View marking points
  1. Declare and initialise total, read the first value, and use a sentinel loop.
  2. Select positive values only and read again on every loop path.
  3. Give precise labelled flowchart nodes/edges for sequence, selection and iteration.
  4. Return 7 and 0 for the two streams without processing -1.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 26An event admits a person exactly when they have a ticket, are not banned, and are either at least 16 or accompanied. (a) Refine 'decide admission' into input, derived conditions and output with declared types. (b) Write the Cambridge Boolean expression using AND, OR and NOT, with parentheses. (c) Evaluate ticket=TRUE,banned=FALSE,age=15,accompanied=TRUE, then change banned to TRUE. Explain why removing parentheses can make the policy ambiguous.4 indicative marks

An event admits a person exactly when they have a ticket, are not banned, and are either at least 16 or accompanied. (a) Refine 'decide admission' into input, derived conditions and output with declared types. (b) Write the Cambridge Boolean expression using AND, OR and NOT, with parentheses. (c) Evaluate ticket=TRUE,banned=FALSE,age=15,accompanied=TRUE, then change banned to TRUE. Explain why removing parentheses can make the policy ambiguous.

Cambridge 2027: Direct conceptual match

Stepwise refinement and Boolean admission logic: each cited registered row is explicitly requested and demonstrated in the worked answer. Exhaustive Boolean policy tests ensure a ban or missing ticket always denies, including the two published traces. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

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Worked guidance

  1. Top-level task DecideAdmission becomes ReadDetails, EvaluatePolicy, ReportDecision. Refine ReadDetails to obtaining Ticket,Banned,Accompanied as BOOLEAN and Age as INTEGER; EvaluatePolicy first forms AgeOK=(Age>=16), then combines conditions. This replaces a vague task with programmable operations.
  2. DECLARE Ticket : BOOLEAN
    DECLARE Banned : BOOLEAN
    DECLARE Accompanied : BOOLEAN
    DECLARE AgeOK : BOOLEAN
    DECLARE Admit : BOOLEAN
    DECLARE Age : INTEGER
    INPUT Ticket
    INPUT Banned
    INPUT Age
    INPUT Accompanied
    AgeOK <- Age >= 16
    Admit <- Ticket AND (NOT Banned) AND (AgeOK OR Accompanied)
    OUTPUT Admit
  3. For TRUE,FALSE,15,TRUE, AgeOK is FALSE but the grouped alternative is TRUE and NOT Banned is TRUE, so Admit=TRUE. With Banned=TRUE, NOT Banned is FALSE and the conjunction becomes FALSE regardless of accompaniment. Parentheses make it explicit that accompaniment is only an alternative to the age check, not an override of the ticket/ban requirements.

Self-marking points

View marking points
  1. Refine to separately read data, calculate age/admission conditions and output a decision.
  2. Declare Boolean flags and INTEGER age.
  3. Use Ticket AND (NOT Banned) AND ((Age>=16) OR Accompanied).
  4. Evaluate TRUE then FALSE and explain explicit grouping.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 27Declare Scores[-2:2] OF INTEGER with values [4,7,1,9,3] in increasing index order. (a) State its element count and legal indices, contrasting with Python's default list indexing. (b) Trace FOR Index <- 2 TO -2 STEP -2, accumulating Scores[Index] from initial Total=0. Give indices and totals. (c) Write the complete declared Cambridge pseudocode and explain why a blanket 'all arrays start at 1' rule is incorrect.4 indicative marks

Declare Scores[-2:2] OF INTEGER with values [4,7,1,9,3] in increasing index order. (a) State its element count and legal indices, contrasting with Python's default list indexing. (b) Trace FOR Index <- 2 TO -2 STEP -2, accumulating Scores[Index] from initial Total=0. Give indices and totals. (c) Write the complete declared Cambridge pseudocode and explain why a blanket 'all arrays start at 1' rule is incorrect.

Cambridge 2027: Direct conceptual match

Declared array bounds and inclusive STEP loops: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent index-keyed map traversal verifies signed bounds, endpoint inclusion, three visits and total eight without misusing Python negative indices. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. The count is upper-lower+1=2-(-2)+1=5. Scores[-2]=4, Scores[-1]=7, Scores[0]=1, Scores[1]=9, Scores[2]=3. Cambridge declarations specify bounds; the guide often uses 1 but does not require it. Python list positions default to zero-based; a Python negative index refers from the end, not to this declared coordinate system.
  2. DECLARE Scores : ARRAY[-2:2] OF INTEGER
    DECLARE Index : INTEGER
    DECLARE Total : INTEGER
    Scores[-2] <- 4
    Scores[-1] <- 7
    Scores[0] <- 1
    Scores[1] <- 9
    Scores[2] <- 3
    Total <- 0
    FOR Index <- 2 TO -2 STEP -2
       Total <- Total + Scores[Index]
    NEXT Index
    OUTPUT Total
  3. The loop visits 2,0,-2, including the lower endpoint because it is reached exactly. Totals are 3,4,8, so output is 8. Index values after termination are not needed. A zero or wrong-sign STEP must not be substituted; bounds and direction belong to this declared loop rather than a universal indexing convention.

Self-marking points

View marking points
  1. State five elements and indices -2,-1,0,1,2.
  2. Trace the descending STEP loop indices 2,0,-2.
  3. Obtain totals 3,4,8 using inclusive bounds.
  4. Declare/init array and loop variables, and distinguish declared bounds from language defaults.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 28Implement in Python 3 console mode: read a parcel count as an integer; reject negative counts; otherwise charge a fixed 2 units plus 3 per parcel; print the integer charge. (a) Identify the constant and variables with intended types and implement the design. (b) Predict exact console output for input 4,0 and -1 in separate runs. (c) Explain why int(input()) is needed and what additional handling a noninteger input would require. This written answer is not a completed Paper 4 practical.4 indicative marks

Implement in Python 3 console mode: read a parcel count as an integer; reject negative counts; otherwise charge a fixed 2 units plus 3 per parcel; print the integer charge. (a) Identify the constant and variables with intended types and implement the design. (b) Predict exact console output for input 4,0 and -1 in separate runs. (c) Explain why int(input()) is needed and what additional handling a noninteger input would require. This written answer is not a completed Paper 4 practical.

Cambridge 2027: Direct conceptual match

Implementing a structured-English console design: each cited registered row is explicitly requested and demonstrated in the worked answer. Exact published console code executed in subprocesses on three numeric inputs and a noninteger ValueError case; no file output or practical-attainment credit. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. Translate the design in its stated order: obtain count, check domain, then calculate/output only on the valid branch. BASE and PER_PARCEL are intended constants by naming convention in Python, not language-enforced immutable bindings; count and charge vary per run.
  2. BASE = 2
    PER_PARCEL = 3
    count = int(input())
    if count < 0:
        print('invalid')
    else:
        charge = BASE + PER_PARCEL * count
        print(charge)
  3. The separate input streams 4,0,-1 produce lines 14,2,invalid respectively. input() returns text; int converts an integer spelling before arithmetic. A string such as 'many' raises ValueError, so a fuller input specification would require a retry/error handler. The published program assumes a syntactically valid integer and makes that precondition explicit rather than claiming comprehensive input validation.

Self-marking points

View marking points
  1. Use named constants BASE=2 and PER_PARCEL=3 with integer input variable.
  2. Branch before calculation for negative values.
  3. Output 14,2 and invalid for the separate runs.
  4. Explain string input conversion and possible ValueError, not silent acceptance.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 29Cambridge MID(S,x,n) returns a STRING of n characters starting at one-based x; UCASE takes a CHAR; & concatenates. You are also supplied FirstChar(S:STRING) RETURNS CHAR, which extracts the first character of a nonempty string. (a) Define Badge(S) returning uppercase first character followed by MID(S,2,2), assuming LENGTH(S)>=3. Use its return in OUTPUT "[" & Badge("mira") & "]". (b) Give the result and a Python equivalent. (c) Explain why neither UCASE(S) nor assuming an implicit STRING-to-CHAR conversion is justified by the supplied signatures.4 indicative marks

Cambridge MID(S,x,n) returns a STRING of n characters starting at one-based x; UCASE takes a CHAR; & concatenates. You are also supplied FirstChar(S:STRING) RETURNS CHAR, which extracts the first character of a nonempty string. (a) Define Badge(S) returning uppercase first character followed by MID(S,2,2), assuming LENGTH(S)>=3. Use its return in OUTPUT "[" & Badge("mira") & "]". (b) Give the result and a Python equivalent. (c) Explain why neither UCASE(S) nor assuming an implicit STRING-to-CHAR conversion is justified by the supplied signatures.

Cambridge 2027: Direct conceptual match

Supplied string functions and returned expressions: each cited registered row is explicitly requested and demonstrated in the worked answer. Published Python result and short-input guard executed; Cambridge MID and UCASE signatures checked against the 2027 guide. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. FUNCTION Badge(S : STRING) RETURNS STRING
       RETURN UCASE(FirstChar(S)) & MID(S,2,2)
    ENDFUNCTION
    OUTPUT "[" & Badge("mira") & "]"
  2. The supplied FirstChar('mira') returns CHAR m to UCASE, giving M; MID('mira',2,2) is STRING ir, so Badge returns Mir. The enclosing expression outputs [Mir]. The precondition avoids short strings. UCASE requires CHAR: MID returns STRING even if length one, so this answer does not invent a whole-string overload or implicit type conversion. FirstChar is supplied for this exercise, not claimed to be a Cambridge built-in.
  3. def badge(s):
        if len(s) < 3:
            raise ValueError('short name')
        return s[0].upper() + s[1:3]
    print('[' + badge('mira') + ']')
  4. Python's [1:3] includes zero-based positions 1 and 2, matching one-based MID(...,2,2). Its .upper() is a documented string method. A returned value can participate in another expression; a procedure that merely prints cannot be substituted as a string result.

Self-marking points

View marking points
  1. Construct a STRING-returning function using the supplied signatures.
  2. Use the returned string in a larger concatenation expression.
  3. Obtain [Mir] and equivalent Python indexing/slicing.
  4. Respect UCASE CHAR signature and one-based MID versus zero-based slice semantics.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 30The guide supplies RAND(x), a real in [0,x), and INT(y), the integer part of y (equal to floor for the nonnegative arguments here). Assume equal-length subintervals are equally likely. (a) Construct an expression producing integers 4 through 9 inclusive. Prove its range using inequalities, not a few random trials. (b) Evaluate it when RAND(6) returns 0,0.999,1 and 5.999; explain why 6 is not a legal return. (c) Explain the defect in rounding RAND(5)+4 to the nearest integer for six equally likely outcomes.4 indicative marks

The guide supplies RAND(x), a real in [0,x), and INT(y), the integer part of y (equal to floor for the nonnegative arguments here). Assume equal-length subintervals are equally likely. (a) Construct an expression producing integers 4 through 9 inclusive. Prove its range using inequalities, not a few random trials. (b) Evaluate it when RAND(6) returns 0,0.999,1 and 5.999; explain why 6 is not a legal return. (c) Explain the defect in rounding RAND(5)+4 to the nearest integer for six equally likely outcomes.

Cambridge 2027: Direct conceptual match

RAND range and integer bin construction: each cited registered row is explicitly requested and demonstrated in the worked answer. Range proof and executable interval-boundary checks verify six unit-width floor bins, excluded 6 and biased half-width rounding endpoints. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. DECLARE Draw : INTEGER
    Draw <- INT(RAND(6)) + 4
    OUTPUT Draw
  2. If r=RAND(6), 0<=r<6, so INT(r) is one of 0,1,2,3,4,5. Adding 4 gives exactly 4,5,6,7,8,9. Each floor bin [k,k+1) has length 1; under the supplied uniform-interval assumption the six outcomes are equally likely. The guide's range alone is not a proof of distributional uniformity.
  3. Returns 0,0.999,1,5.999 give outputs 4,4,5,9. RAND(6) cannot legally return 6, so the expression cannot produce 10. Rounding a value uniform on [4,9) gives endpoint bins [4,4.5) and [8.5,9) of length 0.5, while interior bins have length 1. Outcomes 4 and 9 would each be half as likely as an interior outcome.

Self-marking points

View marking points
  1. Use INT(RAND(6))+4.
  2. Prove 0<=floor(r)<=5 from 0<=r<6 and hence 4..9.
  3. Trace 4,4,5,9 and exclude the upper endpoint.
  4. Explain half-width endpoint bins under rounding and the need for equal-width bins.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 31A batch issues identical warning lines 'low stock' for each quantity below 3. (a) Define a procedure Warn(ItemCode) that outputs 'low stock: ' followed by its STRING argument, and call it from a single pass through Codes[1:4] and Qty[1:4]. Codes are A,B,C,D and quantities 5,2,0,7. (b) Explain why a procedure fits this output action and why scanning once is better than rescanning the batch for every warning. (c) Give the output and number of stock comparisons.4 indicative marks

A batch issues identical warning lines 'low stock' for each quantity below 3. (a) Define a procedure Warn(ItemCode) that outputs 'low stock: ' followed by its STRING argument, and call it from a single pass through Codes[1:4] and Qty[1:4]. Codes are A,B,C,D and quantities 5,2,0,7. (b) Explain why a procedure fits this output action and why scanning once is better than rescanning the batch for every warning. (c) Give the output and number of stock comparisons.

Cambridge 2027: Direct conceptual match

Procedure selection and efficient pseudocode: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent batch traversal verifies warning order, strict threshold and exactly four comparisons; procedure interface and CALL checked against guide. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. PROCEDURE Warn(ItemCode : STRING)
       OUTPUT "low stock: " & ItemCode
    ENDPROCEDURE
    DECLARE Index : INTEGER
    FOR Index <- 1 TO 4
       IF Qty[Index] < 3 THEN
          CALL Warn(Codes[Index])
       ENDIF
    NEXT Index
  2. Warn performs an output action and needs no returned calculation, so a procedure is appropriate. The caller supplies Codes[Index] as the argument for the parameter ItemCode. Reusing one implementation avoids four copied warning formats and makes a later format change local.
  3. Quantities 2 and 0 satisfy <3, so output is 'low stock: B' then 'low stock: C'. Exactly four threshold comparisons occur. One pass is O(n) with constant extra work per item. Repeating a full n-item scan separately for each of up to n warnings could require O(n^2) comparisons without improving this task; no sort or second search is necessary.

Self-marking points

View marking points
  1. Define Warn with a typed parameter and output side effect.
  2. Use CALL for each qualifying quantity in a single bounded pass.
  3. Output warnings for B and C only, with four comparisons.
  4. Justify procedure reuse and O(n) scan versus avoidable repeated O(n2n^{2}) work.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 32An editor needs Undo after recent edits and a history that survives process exit. (a) Define a stack ADT in terms of stored edits and Push,Pop,IsEmpty operations, with empty-pop behaviour. Explain why an ADT is not just an array. (b) Trace Push('insert A'),Push('delete B'),Pop,Push('insert C'),Pop. (c) Explain why volatile storage cannot meet the history requirement and design a persistent event log with records sufficient to reconstruct the remaining stack after restart.4 indicative marks

An editor needs Undo after recent edits and a history that survives process exit. (a) Define a stack ADT in terms of stored edits and Push,Pop,IsEmpty operations, with empty-pop behaviour. Explain why an ADT is not just an array. (b) Trace Push('insert A'),Push('delete B'),Pop,Push('insert C'),Pop. (c) Explain why volatile storage cannot meet the history requirement and design a persistent event log with records sufficient to reconstruct the remaining stack after restart.

Cambridge 2027: Direct conceptual match

ADTs, operations and persistent history: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent event replay produces both popped values and remaining stack; persistence claim limited to a design, not crash-safety execution. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. A stack ADT consists of a collection of edits and operations: Push adds at the top; Pop removes/returns the top; IsEmpty reports whether removal is possible. Define empty Pop to report an error without changing state. An array is one concrete representation; a linked representation could implement the same contract.
  2. After two pushes the bottom-to-top state is [insert A,delete B]. Pop returns delete B and leaves [insert A]. Push insert C produces [insert A,insert C]; the next Pop returns insert C and leaves [insert A]. The interface specifies these results independently of physical storage layout.
  3. A memory-only stack is lost at process termination/power loss, so a persistent file is needed. Append records PUSH insert A, PUSH delete B, POP, PUSH insert C, POP in order. Replay applies the same operations and reconstructs [insert A]; saving only pushed names would wrongly restore undone entries. A production log also needs durable writes, consistency/recovery rules and checks for truncated records; this written design is not a durability demonstration.

Self-marking points

View marking points
  1. Define data plus LIFO operations and an explicit empty-pop contract.
  2. Trace popped edits delete B then insert C, leaving insert A.
  3. Separate an abstract interface from a possible array implementation.
  4. Persist both pushes and pops, not just edit names, and replay to reconstruct state.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 33A public display project has fixed legal accessibility requirements but uncertain visitor interactions. (a) Explain why a development life cycle links analysis, design, coding, testing and maintenance rather than merely imposing dates. (b) Compare waterfall and iterative prototypes for this mixed situation, giving a benefit and drawback of each. (c) Propose acceptance evidence and change control so iteration does not excuse missing accessibility requirements.4 indicative marks

A public display project has fixed legal accessibility requirements but uncertain visitor interactions. (a) Explain why a development life cycle links analysis, design, coding, testing and maintenance rather than merely imposing dates. (b) Compare waterfall and iterative prototypes for this mixed situation, giving a benefit and drawback of each. (c) Propose acceptance evidence and change control so iteration does not excuse missing accessibility requirements.

Cambridge 2027: Direct conceptual match

Development life cycles, benefits and trade-offs: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual lifecycle review includes purpose, deliverables, both benefits/drawbacks and controlled feedback, without substituting a bare list of stages. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. A life cycle organises how requirements become a designed, implemented, tested and maintained system, with outputs and review criteria at each stage. Analysis establishes users/constraints; design specifies interactions and architecture; coding implements; testing checks behaviour; maintenance corrects/adapts the deployed system. It supports responsibility, traceability and planned verification, not just a calendar.
  2. Waterfall's staged sign-off supports budget/documentation and stable mandated requirements, but misunderstandings may be discovered late and be costly to change. Iterative prototypes expose uncertain visitor workflows early and allow feedback-driven revision, but repeated rework and expanding scope can make schedules/budgets harder to control.
  3. Use a stable requirements/acceptance baseline for accessibility and iterate uncertain interactions against it. Record testable criteria, test with intended users and relevant assistive technology, link defects to requirements, and approve changed scope rather than silently dropping a requirement. Passing a prototype demo is not automatically production acceptance or proof of legal compliance.

Self-marking points

View marking points
  1. Explain lifecycle stages as coordinated deliverables, feedback and traceability.
  2. Give waterfall planning/documentation benefit and late-change risk.
  3. Give iterative feedback benefit and rework/scope-control risk.
  4. Link acceptance tests and approved changes to fixed accessibility requirements.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 34A ticket machine has states Idle,Selecting and Paid. Select from Idle enters Selecting; Cancel there returns Idle; successful Pay there enters Paid; Print from Paid returns Idle. All other events leave state unchanged. (a) Draw the labelled state-transition diagram and explain its purpose. (b) Specify a structure chart with Main calling ReadEvent(), NextState(State,Event) returning State, and Display(State). Give parameter/result arrows. (c) Give equivalent driver pseudocode for four supplied events Select,Pay,Print,Cancel, starting Idle, and report the state after each.4 indicative marks

A ticket machine has states Idle,Selecting and Paid. Select from Idle enters Selecting; Cancel there returns Idle; successful Pay there enters Paid; Print from Paid returns Idle. All other events leave state unchanged. (a) Draw the labelled state-transition diagram and explain its purpose. (b) Specify a structure chart with Main calling ReadEvent(), NextState(State,Event) returning State, and Display(State). Give parameter/result arrows. (c) Give equivalent driver pseudocode for four supplied events Select,Pay,Print,Cancel, starting Idle, and report the state after each.

Cambridge 2027: Direct conceptual match

Structure-chart interfaces and state-transition models: each cited registered row is explicitly requested and demonstrated in the worked answer. Executable total transition table checks all state/event pairs and published four-event trace; structure-chart data directions separately reviewed. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. Draw an initial arrow to Idle, then Idle --Select--> Selecting, Selecting --Cancel--> Idle, Selecting --Pay--> Paid and Paid --Print--> Idle. Label remaining events as self-loops in each state. A state-transition diagram documents allowed behaviour over time and helps find missing/invalid event cases; it is not a call hierarchy.
  2. In the structure chart place Main above ReadEvent, NextState and Display with call lines. ReadEvent returns Event upwards; Main passes State and Event down to NextState and receives the new State upwards; Main passes State down to Display. These labelled data couples describe module interfaces, not temporal transitions.
  3. DECLARE State : STRING
    DECLARE Event : STRING
    DECLARE Count : INTEGER
    State <- "Idle"
    FOR Count <- 1 TO 4
       Event <- ReadEvent()
       State <- NextState(State, Event)
       CALL Display(State)
    NEXT Count
  4. The supplied transition contract defines NextState completely, including unchanged fallback. Applying Select,Pay,Print,Cancel yields Selecting,Paid,Idle,Idle. Cancel in Idle is not one of the four changing transitions. ReadEvent supplies the next event and Display is a procedure; the function return is assigned to State.

Self-marking points

View marking points
  1. Give four named transitions and unchanged-state behaviour with an initial-state marker.
  2. Explain temporal behaviour versus module decomposition.
  3. Show State/Event data into NextState and returned State, plus Display input.
  4. Construct driver calls and trace Selecting,Paid,Idle,Idle.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 35Existing Python total(qty,price) returns qty*price. Enhance it with an optional discount parameter defaulting to 0: accept 0<=discount<=0.5, reject other discounts and negative quantity/price, and return qty*price*(1-discount). (a) Provide backward-compatible code. (b) Give expected results for (2,10),(2,10,0.25),(0,10,0.5) and one invalid input; state old behaviour that must remain. (c) Explain how the new validation affects callers that previously passed negative values, rather than claiming unconditional compatibility.4 indicative marks

Existing Python total(qty,price) returns qty*price. Enhance it with an optional discount parameter defaulting to 0: accept 0<=discount<=0.5, reject other discounts and negative quantity/price, and return qty*price*(1-discount). (a) Provide backward-compatible code. (b) Give expected results for (2,10),(2,10,0.25),(0,10,0.5) and one invalid input; state old behaviour that must remain. (c) Explain how the new validation affects callers that previously passed negative values, rather than claiming unconditional compatibility.

Cambridge 2027: Direct conceptual match

Enhancing existing program functionality: each cited registered row is explicitly requested and demonstrated in the worked answer. Exact published function executed across original-domain regressions, discounted values, endpoints, invalid discounts and negative inputs. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

Show indicative guidance

Worked guidance

  1. def total(qty, price, discount=0):
        if qty < 0 or price < 0 or not 0 <= discount <= 0.5:
            raise ValueError('invalid invoice input')
        return qty * price * (1 - discount)
  2. total(2,10)=20, total(2,10,0.25)=15.0 and total(0,10,0.5)=0.0. For example total(2,10,0.6) raises ValueError. The optional default preserves the original product for valid two-argument nonnegative inputs, so those callers need not change syntax.
  3. This is a functional enhancement, not just a renamed function. It introduces a stronger precondition: legacy calls with negative values now raise an exception rather than returning a product. Document that deliberate change and test callers, zero quantities, both inclusive discount endpoints and just-outside values. Numeric parameter types are assumed; handling arbitrary text would be another requirement.

Self-marking points

View marking points
  1. Add a default parameter and discounted expression while preserving valid two-argument calls.
  2. Reject invalid discount/negative inputs before calculation.
  3. Return 20,15 and 0 for stated valid calls and raise ValueError for invalid domain.
  4. Identify intentional incompatibility for formerly accepted negative values and regression-test callers.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 36A scheduler chains jobs with STRING ID, state restricted to Queued,Running,Done, and a next-job pointer. Use the guide's TYPE forms and these supplied conventions: P^ dereferences P, NIL denotes no target, and forward type references are allowed. (a) Design state, job record and pointer types; explain why unrestricted strings/integers are weaker. (b) Given First->J1 and J1.Next->J2, J2.Next=NIL, mark J2 Done through pointers without copying J1. (c) Explain NIL guards and references versus record values.4 indicative marks

A scheduler chains jobs with STRING ID, state restricted to Queued,Running,Done, and a next-job pointer. Use the guide's TYPE forms and these supplied conventions: P^ dereferences P, NIL denotes no target, and forward type references are allowed. (a) Design state, job record and pointer types; explain why unrestricted strings/integers are weaker. (b) Given First->J1 and J1.Next->J2, J2.Next=NIL, mark J2 Done through pointers without copying J1. (c) Explain NIL guards and references versus record values.

Cambridge 2027: Direct conceptual match

User-defined enumerations, records and pointers: each cited registered row is explicitly requested and demonstrated in the worked answer. Reference-alias model test verifies only J2 changes and NIL guards are safe; guide verifies TYPE forms, while dereference/NIL/forward-reference conventions are explicitly supplied by this exercise. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

AI-assisted placement. Independent teacher approval pending.

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Worked guidance

  1. TYPE JobState = (Queued, Running, Done)
    TYPE JobPointer = ^Job
    TYPE Job
       DECLARE ID : STRING
       DECLARE State : JobState
       DECLARE Next : JobPointer
    ENDTYPE
    DECLARE First : JobPointer
    DECLARE Second : JobPointer
    IF First <> NIL THEN
       Second <- First^.Next
       IF Second <> NIL THEN
          Second^.State <- Done
       ENDIF
    ENDIF
  2. A user-defined enumeration documents and restricts the valid state set; an arbitrary STRING could contain misspellings such as 'Runing'. A Job record gives ID,State,Next one coherent type. JobPointer is a pointer to a Job, allowing chains without storing the next entire record recursively inside each record. The forward type reference expresses this recursive relationship in the design.
  3. First^.Next reads J1's Next pointer, yielding a reference to J2. Second^.State<-Done changes J2 in place; J1's ID,State and Next remain unchanged. Each pointer must be checked against NIL before dereferencing or the operation has no valid target. This is written pointer pseudocode, not a claim that Python exposes Cambridge-style raw pointers.

Self-marking points

View marking points
  1. Define an enumeration, forward pointer type and record with correctly typed fields.
  2. Use the enum to restrict states and record to bind related fields.
  3. Dereference First and the next pointer to change J2.State only.
  4. Guard NIL before dereferencing and distinguish reference from record copy.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 37A remote consultation sends a request and a continuous voice conversation. (a) Explain why sender and receiver need agreed message formats, ordering/error behaviour and addressing rather than just the same cable. (b) Assign application request formatting, transport delivery, inter-network routing and local-frame transmission to four layered functions and explain encapsulation/interface benefits. (c) Compare a reserved circuit for the voice call with shared packet delivery for bursty requests, including setup, bandwidth utilisation and failure/latency trade-offs. Do not assume all voice services use circuits today.4 indicative marks

A remote consultation sends a request and a continuous voice conversation. (a) Explain why sender and receiver need agreed message formats, ordering/error behaviour and addressing rather than just the same cable. (b) Assign application request formatting, transport delivery, inter-network routing and local-frame transmission to four layered functions and explain encapsulation/interface benefits. (c) Compare a reserved circuit for the voice call with shared packet delivery for bursty requests, including setup, bandwidth utilisation and failure/latency trade-offs. Do not assume all voice services use circuits today.

Cambridge 2027: Direct conceptual match

Protocol agreements, layering and circuit switching: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual protocol/layer/circuit checklist checks all named functions and avoids conflating a physical link with compatible protocol semantics. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. A medium carries signals but does not specify how endpoints recognise a message, address a recipient, detect corruption or coordinate responses. Protocols agree these formats and rules so the receiver can interpret the sender's sequence rather than treating it as arbitrary bytes.
  2. At application level the consultation request has meaning and format. Transport manages end-to-end delivery semantics; the internet layer addresses/routes between networks; the link layer delivers frames over the current local link. Encapsulation adds the appropriate control information as data pass down layers, then removes/interprets it on receipt. Defined interfaces let a link technology change without rewriting the application, though layers still introduce overhead.
  3. Circuit switching establishes/reserves a path or channel before communication, offering predictable reserved capacity during the call but wasting that reservation in silence and failing if the circuit breaks. Setup takes time. Packet switching shares capacity and suits bursty requests; individual packets need addressing/forwarding and may experience queuing, reordering or loss. Modern voice commonly uses packets with suitable quality controls, so the voice scenario motivates a trade-off, not a universal circuit-only assertion.

Self-marking points

View marking points
  1. Explain compatible protocol syntax/semantics and control behaviour.
  2. Identify application, transport, internet and link functions plus encapsulation.
  3. Explain modular replacement through defined adjacent-layer interfaces.
  4. Contrast dedicated reserved path/setup and idle capacity with shared packets and variable delay.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 38Compare simplified fixed-width load/store RISC with complex variable-length CISC. (a) Discuss decoding, memory operands, registers and interrupt-state handling. In a separate toy comparison interrupts wait for the current instruction to finish: longest uninterruptible instructions take 1 cycle (RISC) and 6 (CISC). Compare worst residual waits. (b) Schedule 6 independent instructions on a three-stage fetch/decode/execute pipeline with one cycle per stage and no stalls; compare non-overlapped execution. (c) Explain data hazards and interrupt flush/restart; do not universalise the toy latency assumptions.4 indicative marks

Compare simplified fixed-width load/store RISC with complex variable-length CISC. (a) Discuss decoding, memory operands, registers and interrupt-state handling. In a separate toy comparison interrupts wait for the current instruction to finish: longest uninterruptible instructions take 1 cycle (RISC) and 6 (CISC). Compare worst residual waits. (b) Schedule 6 independent instructions on a three-stage fetch/decode/execute pipeline with one cycle per stage and no stalls; compare non-overlapped execution. (c) Explain data hazards and interrupt flush/restart; do not universalise the toy latency assumptions.

Cambridge 2027: Direct conceptual match

RISC/CISC, register roles and pipeline timing: each cited registered row is explicitly requested and demonstrated in the worked answer. Executable stage schedule verifies eight-cycle ideal latency and no stage conflicts; hazard/interrupt qualifications manually reviewed. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. In the simplified RISC model loads/stores move memory data to/from general registers and ALU work uses registers; regular instruction fields ease decoding/pipelining. CISC offers richer instructions and memory-operand forms, often with variable encoding and more decoding work. In the separate stated interrupt model, an arrival just after an instruction starts waits up to about 1 versus 6 cycles before completion, plus unspecified entry overhead. This is a consequence of the supplied longest-instruction assumptions, not an ISA-wide latency guarantee.
  2. Schedule I1 F1,D2,E3; I2 F2,D3,E4; I3 F3,D4,E5; I4 F4,D5,E6; I5 F5,D6,E7; I6 F6,D7,E8. A three-stage pipeline completes n+2=8 cycles after filling/draining versus 6*3=18 non-overlapped cycles, assuming no hazards, cache delays or branch penalties.
  3. If I2 needs I1's unfinished result, a data hazard requires stalling or forwarding; the ideal schedule no longer applies unchanged. Both ISA styles support interrupts: the machine must preserve an appropriate resumption PC, status and live context before a handler, and restore them afterward. A pipelined processor must establish a precise architectural state, often discarding/restarting uncommitted stages, rather than exposing a half-updated instruction as completed.

Self-marking points

View marking points
  1. Contrast simplified instruction/decode models, register computation and complex instructions without absolute modern hardware claims.
  2. Explain saved PC/status/register context and interrupt support in both designs.
  3. Schedule six instructions in 8 rather than 18 cycles.
  4. Explain dependencies/stalls/forwarding and precise interruption rather than losing partially executed work.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 39(a) Classify and justify: one scalar instruction stream processing one stream; one instruction applied to many pixels; different tasks on different data; multiple instruction streams applied to one stream as a rare conceptual model. (b) A simulation uses 1000 cooperating processors. Explain what makes it massively parallel, the communication/memory choices and why adding processors may not scale perfectly. (c) If 20% of the runtime is necessarily serial, calculate the best speed-up with 4 ideal parallel workers and the limiting speed-up as workers grow.4 indicative marks

(a) Classify and justify: one scalar instruction stream processing one stream; one instruction applied to many pixels; different tasks on different data; multiple instruction streams applied to one stream as a rare conceptual model. (b) A simulation uses 1000 cooperating processors. Explain what makes it massively parallel, the communication/memory choices and why adding processors may not scale perfectly. (c) If 20% of the runtime is necessarily serial, calculate the best speed-up with 4 ideal parallel workers and the limiting speed-up as workers grow.

Cambridge 2027: Direct conceptual match

Flynn classes and massively parallel systems: each cited registered row is explicitly requested and demonstrated in the worked answer. Independent Amdahl calculation and instruction/data-stream classification matrix checked, with rare MISD caveat. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. The four descriptions are SISD (single instruction/single data), SIMD (single instruction/multiple data), MIMD (multiple instruction/multiple data) and MISD (multiple instruction/single data). MISD is rare as a practical classification and the description is conceptual, not a claim that every redundant system cleanly fits it.
  2. A massively parallel machine uses a very large number of processing elements cooperating on portions of a task. Memory may be distributed with message passing or shared/partitioned through an interconnect; communication, synchronisation and uneven work allocation consume time. A 1000-processor count alone does not show that a serial application is effectively parallelised.
  3. Normalize original runtime to 1. With 4 workers the ideal time is 0.2+0.8/4=0.4, so speed-up is 1/0.4=2.5. As workers grow the parallel term tends to zero but the serial 0.2 remains, limiting speed-up to 5 even before real communication overheads. The answer is not 4 or unbounded.

Self-marking points

View marking points
  1. Identify SISD,SIMD,MIMD,MISD using instruction/data stream counts.
  2. Explain many cooperating processors and shared/distributed memory/communication costs.
  3. Account for serial work, synchronisation and load imbalance.
  4. Compute 1/(0.2+0.8/4)=2.5 and limiting speed-up 5.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 40A museum must retain an older operating system for an archival application while running a current host. (a) Explain a system virtual machine and hypervisor and distinguish it from a Java language VM. (b) Propose isolation, snapshots and resource allocation benefits for this museum. (c) Explain CPU/memory/I/O overhead, device compatibility, security and backup limitations; is a snapshot on the same physical disk a disaster-recovery backup?4 indicative marks

A museum must retain an older operating system for an archival application while running a current host. (a) Explain a system virtual machine and hypervisor and distinguish it from a Java language VM. (b) Propose isolation, snapshots and resource allocation benefits for this museum. (c) Explain CPU/memory/I/O overhead, device compatibility, security and backup limitations; is a snapshot on the same physical disk a disaster-recovery backup?

Cambridge 2027: Direct conceptual match

Virtual-machine roles, benefits and limits: each cited registered row is explicitly requested and demonstrated in the worked answer. Manual separation of system versus language VMs, snapshot versus independent backup and shared-host security/resource limitations. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. A system VM presents virtual CPU, memory, disks and devices to a guest OS. The hypervisor mediates these resources on physical hardware, allowing an older guest to coexist with the current system. A Java VM instead provides a language bytecode execution environment; it is not by itself a complete virtual PC running an arbitrary guest OS.
  2. The museum can preserve a compatible software environment, limit allocated memory/CPU and isolate experiments from the main host. A snapshot can aid rapid rollback to a known state for repeatable tests, subject to application/disk consistency. These are useful management tools, not proof of perfect isolation or application correctness.
  3. Virtualisation uses host memory/CPU and may add I/O overhead or lack a specialised legacy device. Guests need patching, permissions and network controls; a vulnerable hypervisor or shared resource exhaustion can affect multiple VMs. A snapshot stored on the same physical disk is lost with that disk and is not an independent disaster-recovery backup. Export tested backups elsewhere and preserve required licences/configurations.

Self-marking points

View marking points
  1. Describe virtual hardware supporting a guest OS and the hypervisor's mediation.
  2. Distinguish system VM from bytecode execution environment.
  3. Apply isolation, reproducibility/snapshot and allocation benefits.
  4. Discuss overhead/shared-host risk and why same-disk snapshot is not independent backup.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 41A clinic serves HTTPS. (a) Explain obtaining a server certificate: key pair, request to a CA, identity/domain validation and the CA's signature. (b) Describe a modern TLS client/server exchange at a high level: certificate chain/name/time validation, proof of server private-key possession, shared session-key derivation and symmetric authenticated traffic protection. (c) Explain how a digital signature is created/verified and why a certificate or encrypted connection does not guarantee an honest website. Distinguish obsolete SSL from current TLS terminology.5 indicative marks

A clinic serves HTTPS. (a) Explain obtaining a server certificate: key pair, request to a CA, identity/domain validation and the CA's signature. (b) Describe a modern TLS client/server exchange at a high level: certificate chain/name/time validation, proof of server private-key possession, shared session-key derivation and symmetric authenticated traffic protection. (c) Explain how a digital signature is created/verified and why a certificate or encrypted connection does not guarantee an honest website. Distinguish obsolete SSL from current TLS terminology.

Cambridge 2027: Direct conceptual match

TLS session authentication and certificate signatures: each cited registered row is explicitly requested and demonstrated in the worked answer. Primary TLS 1.3 specification checked for certificate validation, CertificateVerify, key agreement and authenticated records; no obsolete RSA-key-transport assumption. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. The server generates a key pair and submits a certificate request containing its public key and requested identity to a CA. The CA performs the applicable validation and signs a certificate binding identity information to that public key. The server protects its private key; a domain-validated certificate validates control of a domain, not the medical quality of the site's claims.
  2. In a modern TLS handshake the client checks the certificate chain against trusted issuers, validity dates and the intended hostname. The server proves possession of the corresponding private key by signing handshake information. Authenticated key agreement derives shared session secrets; modern TLS does not simply send a plaintext symmetric key or require RSA key transport. Symmetric authenticated encryption then protects application records from reading/undetected modification in transit.
  3. For a digital signature the signer hashes the relevant message and applies its signature algorithm using the private key; verification uses the public key and message to check authenticity/integrity. This does not hide the message, and is not universally implemented as 'encrypting the hash'. CA signatures support certificate validation, but a malicious operator may have a valid certificate for its own domain. SSL is obsolete terminology/protocol family; deploy supported TLS, not SSL merely because people call certificates 'SSL certificates'.

Self-marking points

View marking points
  1. Certificate binds an identity/name to a public key under a CA signature; private key is not sent to the CA/client.
  2. Client validates trust chain, hostname and validity and server proves key possession.
  3. Key agreement derives session secrets; authenticated symmetric encryption protects records.
  4. Describe hash/sign with private key and verification with public key without equating signing with secrecy.
  5. Explain trust limits and obsolete SSL wording.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 42Two designs compute eligible customer names: A iterates records, changes a result list and calls helper routines; B states eligibility facts/rules and asks a goal; C puts eligibility behaviour in customer objects. (a) Define programming paradigm and identify procedural/imperative, declarative and object-oriented characteristics. (b) Express the tiny input [('Ana',20),('Bo',15)] as a procedural Python function selecting age>=18 and trace its output. (c) Explain why one language can support multiple paradigms and why a Python list comprehension alone does not prove a full declarative rule engine.4 indicative marks

Two designs compute eligible customer names: A iterates records, changes a result list and calls helper routines; B states eligibility facts/rules and asks a goal; C puts eligibility behaviour in customer objects. (a) Define programming paradigm and identify procedural/imperative, declarative and object-oriented characteristics. (b) Express the tiny input [('Ana',20),('Bo',15)] as a procedural Python function selecting age>=18 and trace its output. (c) Explain why one language can support multiple paradigms and why a Python list comprehension alone does not prove a full declarative rule engine.

Cambridge 2027: Direct conceptual match

Meaning of programming paradigm: each cited registered row is explicitly requested and demonstrated in the worked answer. Published Python procedural function executed on supplied and boundary records; conceptual paradigm claims manually reviewed without claiming full declarative implementation. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. A programming paradigm is a model/style for structuring computation and expressing solutions, not merely a language brand. A is procedural/imperative because explicit operations, control flow and mutable state determine how the result is built. B is declarative because facts/rules describe relationships and a goal asks what follows. C is object-oriented because behaviour is organised with object state and interfaces.
  2. def eligible(records):
        result = []
        for name, age in records:
            if age >= 18:
                result.append(name)
        return result
  3. For [('Ana',20),('Bo',15)], the first age passes and appends Ana; the second fails, so the function returns ['Ana']. Python can express procedural and object-oriented designs in the same program, and compact comprehensions express collection construction but are not evidence of general facts/rules unification or backtracking. Paradigm and implementation language are related but not identical categories.

Self-marking points

View marking points
  1. Define a paradigm as an organising model/style of expressing computation.
  2. Distinguish explicit control/state, facts/rules/goals and objects encapsulating state/behaviour.
  3. Construct function returning ['Ana'].
  4. Explain multi-paradigm languages and avoid inferring a rule engine from compact syntax.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

Question 43A learner proposes AS with Paper 1 only, then A Level with Paper 3 only; another proposes a browser-based JavaScript app with no recorded tests for Paper 4. (a) Correct the AS/A paper plan and give each paper's duration, marks, assessed sections and calculator rule. (b) Using the 2027-29 version 2 update, identify the clarified topics and whether specimen materials were replaced. (c) Correct the practical proposal: languages/mode, excluded paradigms, access restrictions and evidence submission. Explain what this written plan cannot demonstrate.5 indicative marks

A learner proposes AS with Paper 1 only, then A Level with Paper 3 only; another proposes a browser-based JavaScript app with no recorded tests for Paper 4. (a) Correct the AS/A paper plan and give each paper's duration, marks, assessed sections and calculator rule. (b) Using the 2027-29 version 2 update, identify the clarified topics and whether specimen materials were replaced. (c) Correct the practical proposal: languages/mode, excluded paradigms, access restrictions and evidence submission. Explain what this written plan cannot demonstrate.

Cambridge 2027: Direct conceptual match

9618 assessment routes and practical evidence limits: each cited registered row is explicitly requested and demonstrated in the worked answer. Official syllabus pp11-12,40 and December 2025 update verified directly; practical assessment row deliberately excluded from placements. Written conceptual evidence only, pending independent teacher review; not execution by the learner or practical certification.

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Worked guidance

  1. AS takes Papers 1 and 2, not Paper 1 alone; A takes all four, either in an allowed staged route carrying forward eligible AS results or together. Each paper is 75 marks and calculators are prohibited in every paper. P1 is 1 h 30 min covering sections 1-8; P2 is 2 h covering 9-12 with pseudocode answers; P3 is 1 h 30 min covering 13-20; P4 is 2 h 30 min covering practical application of 19-20 except low-level/declarative programming.
  2. The version 2 notice is dated December 2025. It clarifies which papers are required at each level and the calculator rule on syllabus p11, and explicitly says specimen materials were not updated. Use the target 2027-2029 syllabus/guide, not the 2026 comparison guide as authority for this cohort.
  3. Paper 4 uses Java, Python or a .NET version of Visual Basic, all in console mode, on centre computers without internet/email. A browser JavaScript app is not an approved substitute. Candidates submit complete code and testing evidence through the supplied evidence document, with requested listings/results and regular saves. Low-level and declarative tasks are excluded from P4, not from every theory context. A written plan and model code cannot demonstrate the candidate's actual programming, debugging, saved execution evidence or compliant practical environment; cs9618-practical remains unclosed.

Self-marking points

View marking points
  1. AS requires Papers 1 and 2; A requires all four, each 75 marks and no calculators.
  2. Give P1 90 min sections1-8; P2 120 min sections9-12; P3 90 min sections13-20; P4 150 min sections19-20 with exclusions.
  3. Version 2 December 2025 clarifies entry/calculators on p11; specimens not updated.
  4. Use console Java/Python/VB.NET with complete program code/testing evidence and no internet/email on centre computers.
  5. Exclude low-level/declarative from P4 and explicitly leave practical performance unproven.

Examiner tip

Give intermediate states and explicit assumptions. These are indicative distinct points, not an official mark allocation or evidence that you completed a practical assessment.

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